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Chapter 6: Performing SignalTap II Logic Analysis
6–7
SignalTap II Example Designs
2. Verify that the Enable SignalTap II option is on.
When this option is on, Signal Compiler inserts an instance of the SignalTap II
logic analyzer into your design.
3. Select a depth of 128 for the SignalTap II sample buffer (that is, the number of
samples stored for each input signal) in the SignalTap II depth list.
4. Verify that the Use Base Clock option is on.
5. Click the Simple tab and verify that the Use Board Block to Specify Device
option is on.
6. Click the Compile button.
When the conversion is complete, information messages in the dialog box display
the memory allocated during processing.
1
You must compile your design before you open the SignalTap II Analyzer
block because the block relies on data files that create during compilation.
7. Click Scan Jtag and select the appropriate download cable and device (for
example, USB-Blaster cable and EP2C35 device).
8. Click Program to download your design to the development board.
9. Click OK .
Specifying the Trigger Levels
To specify the trigger levels, follow these steps:
1. Double-click the SignalTap II Logic Analyzer block. The dialog box displays all
the nodes connected to SignalTap II Node blocks as signals to be analyzed.
2. Specify the following trigger condition settings for the firstandout block:
a. Click firstandout under Signal Tap II Nodes .
b. Select Falling Edge in the Set Trigger Level list.
c. Click Change . The condition is updated.
3. Repeat these steps to specify the trigger condition High for the secondandout
block.
The SignalTap II logic analyzer captures data for analysis when it detects all trigger
patterns simultaneously on the input signals. For example, because you specify
Falling Edge for firstandout and High for secondandout , the SignalTap II logic
analyzer only triggers when it detects a falling edge on firstandout and a logic level
high on secondandout .
Performing SignalTap II Analysis
You are now ready to run the analyzer and display the results in a MATLAB plot.
After you click Acquire , the SignalTap II logic analyzer begins analyzing the data and
waits for the trigger conditions to occur. To perform analysis, follow these steps:
1. Click Scan Jtag in the SignalTap II Logic Analyzer dialog box and select the
appropriate download cable and device.
November 2013
Altera Corporation
DSP Builder Handbook
Volume 2: DSP Builder Standard Blockset
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